Plan KiCad PCB Projects

OpenAI

Guides PCB engineers through structured KiCad project intake — collecting requirements, selecting parts, defining architecture, and generating manufacturing-ready designs with human review at every stage.

PCB DesignKiCadHardware EngineeringProject Planning

What This Workflow Does

This workflow manages the full intake-to-output pipeline for KiCad PCB projects. It collects detailed requirements through conversation, clarifies open questions, proposes board architecture and parts, defines manufacturing settings, generates schematics and board layouts, and publishes everything to GitHub — with human approval checkpoints throughout.

It's built for PCB engineers and project managers who want to reduce ambiguity early and avoid costly design rework.

Prerequisites

  • A Needle platform account with access to AI v2 nodes
  • A KiCad worker service endpoint (for schematic/PCB generation and checks)
  • A GitHub Personal Access Token (for publishing the final project)
  • Basic familiarity with KiCad PCB design concepts

Workflow Variables

Before running, configure these variables in your workflow settings:

VariableTypeExample
KICAD_WORKER_BASE_URLRegularhttps://your-worker.example.com
KICAD_VERSIONRegular8.0
GITHUB_PATSecretghp_xxxxxxxxxxxx
GITHUB_API_VERSIONRegular2022-11-28
DEFAULT_VISIBILITYRegularprivate
DEFAULT_BRANCHRegularmain
MAX_ERC_REPAIR_LOOPSRegular5
MAX_DRC_REPAIR_LOOPSRegular5

How the Workflow Works

The workflow is organized into seven phases, each building on the last.

Phase 1: Intake

  1. You manually trigger the workflow to start.
  2. An AI agent collects the next most important missing information from you, asking at most three focused questions at a time. It never guesses dimensions, currents, packages, or fabrication constraints.
  3. A human-in-the-loop step lets you review and edit the normalized requirements, open questions, and blockers before moving on.
  4. A code node structures the reviewed data into a clean internal format with project metadata.

Phase 2: Architecture and Planning

Four AI agents run in parallel to analyze your requirements:

AgentPurpose
Board DecompositionDetermines whether the design involves one board or multiple boards
ArchitectureCreates a block diagram, power tree, and recommends layer count with justification
Parts SelectionSelects candidate parts and alternates; flags high-risk components
ManufacturingInterprets fabrication settings; proposes conservative defaults where data is missing

Results merge into one unified project state. You then review and approve the architecture, parts list, and manufacturing defaults at a human-in-the-loop checkpoint.

Phase 3: Part Retrieval and Validation

For each selected part, the workflow searches the internet in parallel for:

  • Official manufacturer datasheets and package drawings
  • KiCad symbols and footprints from SnapMagic/SnapEDA

An AI agent validates parts against the retrieved datasheets. Any parts that can't be fully verified are flagged, and you review them at another human checkpoint before proceeding.

Phase 4: Schematic Generation and ERC

The workflow calls your KiCad worker service to:

  1. Generate the project skeleton (file structure)
  2. Generate the schematic from the approved architecture and parts
  3. Run Electrical Rules Check (ERC)

If ERC errors are found, an automatic repair loop kicks in — the AI agent reads the ERC report, produces the smallest valid fix, applies it, and re-runs the check. This repeats up to MAX_ERC_REPAIR_LOOPS times. You approve the final schematic state before moving on.

Phase 5: PCB Layout

After schematic approval, the workflow handles board layout:

  1. Board setup — Configures stackup and design rules based on your manufacturing parameters
  2. Placement — An AI agent plans component positions respecting mechanical constraints, connectors, power paths, decoupling, and test access
  3. Routing — An AI agent creates the routing plan, prioritizing critical nets and preserving return paths
  4. DRC — Runs Design Rule Check with schematic parity validation

A DRC repair loop works the same way as the ERC loop, automatically fixing violations up to MAX_DRC_REPAIR_LOOPS times. You approve the final layout at a human checkpoint.

Phase 6: Manufacturing Output

  1. A jobset is generated covering Gerbers, BOM, and pick-and-place files
  2. The jobset runs to produce all output files
  3. Artifacts are collected into a complete manufacturing package

You review and approve the final package before publication.

Phase 7: GitHub Publication

The workflow publishes your complete project to GitHub:

  1. Validates your GitHub credentials
  2. Creates a new repository (public or private, based on your settings)
  3. Uploads all project files in a loop
  4. Creates GitHub issues for any known risks or open TODOs
  5. Adds a KiCad validation CI workflow

An AI agent then generates a final summary covering what was completed, what assumptions were made, what still needs manual review, and the GitHub repo URL.

Output

At the end, you get a fully structured, human-verified KiCad PCB project including:

  • Normalized project name and description
  • Single-board or multi-board classification
  • Physically validated board architecture with layer count rationale
  • Selected parts list with alternates and flagged high-risk components
  • Manufacturing parameters with conservative defaults clearly marked
  • Clean schematics that pass ERC
  • Routed PCB layout that passes DRC
  • Manufacturing-ready output files (Gerbers, BOM, pick-and-place)
  • A GitHub repository with all files, issues, and CI workflow

Notes

  • The AI never guesses critical parameters like dimensions or currents — it asks you to provide them.
  • When you say "you decide," the AI proposes defaults clearly marked as AI-proposed.
  • Human-in-the-loop steps appear at every major decision point, keeping you in control.
  • The modular phase structure makes it easy to identify and fix issues early in the process.
  • This structured approach helps reduce design rework and speeds up PCB development cycles.

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